CMP5013A Architectures & Operating Systems Assignment: A1

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Module: CMP5013A Architectures & Operating Systems Assignment: A1: Computing with Logic

Date set: 4/10/23
Value: 10%
Date due: 1/11/23
Returned by: 15/11/23
Submission: In lab inspection

Learning outcomes

Gain experience in building computing processes using logic gates and to be able to demonstrate understanding and correct functionality of process blocks such as multiplexers and adders.

Specification

Preparations

It is highly recommended that you go through these preparations before you come to the lab.

In this lab, you will be using the online web-based tool – Circuitverse. Please first follow the steps in the separate sheet called Quick Start to Circuitverse to get yourself familiar with this tool.

It is also important to have viewed the online lecture on Transistors and Combinational Logic in Week 2 on Blackboard.

Part 1 – Multiplexer

For this part you should see lecture Slides 31-34 from the Week 2 lecture on Transistors and Combinational Logic as a guidance.

Stage 1 formative:

First create 2 to 1 Mutliplexer (see slide 31, left circuit only) using only the basic Gates in the left-hand panel. You are not allowed to use the pre-built multiplexer options under Decoders & Plexers panel. This must be built at a basic logic gate level from

scratch. 

Stage 2 summative:

Once you are satisfied that your 2 to 1 multiplexer works, now build a 4 to 1 multiplexer using the cascade approach as shown in slide 34. You are not allowed to use the prebuilt multiplexer options under Decoders & Plexers panel, the whole circuit must be
drawn using basic logic gates from the Gates panel.

Important: You should label all of the inputs and outputs according to the labels shown in slide 34. The assessors will need to see the correct inputs and outputs.

Reminder: to label a component first click on the component you want (it will highlight as yellow) then on the left pane under Properties you can type in the label you want.

Part 2 – Adder

In this part you should see lecture Slides 35-37 from the Week 2 lecture on Combinational Logic as a guidance.

Stage 3 summative:

Open a new sheet (go to Circuit > New Circuit +, and enter new name 1 Bit Adder). With slide 36 as a reference, build a 1 Bit Adder using only the basic Gates in the lefthand panel. For this stage you are not allowed to use the pre-built adder under the Misc panel of components.

Important: You should label your inputs as A0, B0 and the input carry as C0, with the output sum as S0 and output carry as C1. The assessors will need to see the correct inputs and outputs.

Stage 4 summative:

Open a new sheet (go to Circuit > New Circuit +, and enter new name 4 Bit Adder).

First, re-draw the circuit from Stage 3 (Tip: A easier way is to find the circuit in the dashboard, click “More” > “Create Copy” > “Launch simulator” > rename the project name as “4 Bit adder”). 


Then with slide 37 as a guide, expand your 1-Bit Adder into a 4-Bit adder. For this part you ARE allowed to use the pre-built adders under the Misc panel of components to save you redrawing everything for the next three 1-Bit adders only. For the input and output ports of Misc, you can refer to Help on the Properties box.


You should label all of your inputs and outputs as shown in slide 37. The assessors will need to see the correct inputs and outputs.

Important: save your work and do not delete your Circuitverse account until the end of the academic year, we may need to refer to your work (Project > Save Online).

See the Circuitverse help sheet on how to save your work privately.

Deliverables

A) Stage 2: During the in-lab inspection you will demonstrate that your 4 to 1 multiplexer is functioning correctly. You will also be asked about the function of this circuit and verbally give an explanation and point to the relevant parts of the circuit when asked.

B) Stage 3: During the in-lab inspection you will demonstrate that your fully built 1 Bit Adder is functioning correctly. This will be done by showing the correct outputs are given according to the inputs as shown in the truth table in slide 38.

C) Stage 4: During the in-lab inspection you will demonstrate that your 4 Bit Adder is functioning correctly. This will be done by taking the last two digits from your student number and add them together in your circuit and show it gives the right result. You will be asked to verbally explain the calculation and point to the relevant parts of the circuit when asked.

For help with decimal to 4-bit binary conversion see the appendix below on decimal to binary number conversion.
Marking scheme
Activity
Marks
Awarded
Demo of 4:1 MUX
2

Explanation of 4:1 MUX
2

Demo of 1 Bit Adder
2

Demo of 4 Bit Adder
2

Explanation of Addition Calculation
2


Total
/10

Appendix: Decimal to Binary Number Conversion (4 Bits)
Decimal
X3 (23=8)
X2 (22=4)
X1 (21=2)
X0 (20=1)
0
0
0
0
0
1
0
0
0
1
2
0
0
1
0
3
0
0
1
1
4
0
1
0
0
5
0
1
0
1
6
0
1
1
0
7
0
1
1
1
8
1
0
0
0
9
1
0
0
1
10
1
0
1
0
11
1
0
1
1
12
1
1
0
0
13
1
1
0
1
14
1
1
1
0
15
1
1
1
1

Example: the number 13 in decimal is represented as 1101 in binary because (23x1) + (22x1) + (2 1x0) +(2 0x1) = 13 so in a 4-bit adder this can  be input as a3=1, a2=1, a1=0, a0=1.

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